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SPIR-V: switch on an i32 instead of an i1 - #1082

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@maleadt maleadt commented Nov 6, 2026

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InstCombine narrows a switch's condition to the bits it can take. When Julia 1.10 union-splits on a value with two possible types, that can leave a switch i1. LLVM's SPIR-V back-end translates it to an OpSwitch on a boolean, which is invalid SPIR-V:

Failed to validate generated SPIR-V: Type Id 292 is not a scalar numeric type

A minimal module shows the same with LLVM 23's llc -mtriple=spirv64:

define spir_kernel void @k(ptr addrspace(1) %p, i1 %c) {
entry:
  switch i1 %c, label %dflt [
    i1 false, label %a
    i1 true, label %b
  ]
a:
  store i32 1, ptr addrspace(1) %p
  ret void
b:
  store i32 2, ptr addrspace(1) %p
  ret void
dflt:
  ret void
}

This PR zero-extends such conditions to i32 right before translation, keeping each switch's successors so that phis are unaffected. Like widen_bfloat16!, it runs in mcgen because the InstCombine in prepare_execution! would narrow the condition again; I first put it in finish_ir!, and that didn't help.

This came up in JuliaGPU/AcceleratedKernels.jl#199, in a scan of a bits-union array on OpenCL with Julia 1.10 and --check-bounds=yes. With this branch, that test suite passes.

InstCombine narrows a switch's condition to the bits it can take, which leaves a `switch i1`
when Julia 1.10 union-splits on a value with two possible types. The SPIR-V back-end translates
that to an OpSwitch on a boolean, which is invalid ("Type Id is not a scalar numeric type"), so
zero-extend such conditions to `i32` right before translation, after the InstCombine run in
`prepare_execution!`. Hit by AcceleratedKernels.jl's scans of bits-union arrays on OpenCL.
@maleadt

maleadt commented Nov 6, 2026

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Going to fix this in LLVM instead.

@maleadt maleadt closed this Nov 6, 2026
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