66//! Fused nearest-neighbor kernel for a leaf's lower dot-product matrix.
77
88use diskann_vector:: distance:: Metric ;
9- #[ cfg( target_arch = "x86_64" ) ]
10- use diskann_wide:: { SIMDFloat , SIMDMask , SIMDSelect , SIMDVector } ;
9+ use diskann_wide:: { Architecture , SIMDFloat , SIMDMask , SIMDSelect , SIMDVector } ;
1110
1211/// Widest f32 SIMD lane count DiskANN dispatches to, used to size lane scratch.
13- #[ cfg( target_arch = "x86_64" ) ]
1412const MAX_LANES : usize = 16 ;
1513
16- #[ cfg( target_arch = "x86_64" ) ]
1714const L2 : u8 = 0 ;
18- #[ cfg( target_arch = "x86_64" ) ]
1915const COSINE_NORMALIZED : u8 = 1 ;
20- #[ cfg( target_arch = "x86_64" ) ]
2116const INNER_PRODUCT : u8 = 2 ;
22- #[ cfg( target_arch = "x86_64" ) ]
2317const COSINE : u8 = 3 ;
2418
2519/// One leaf-local neighbor and its metric distance.
@@ -238,11 +232,6 @@ struct LeafKernel<'a, 'o, 'w> {
238232}
239233
240234impl LeafKernel < ' _ , ' _ , ' _ > {
241- fn run_scalar ( self ) {
242- process_pairs_scalar ( self . input , self . k , self . output , self . norms , self . worst ) ;
243- }
244-
245- #[ cfg( target_arch = "x86_64" ) ]
246235 fn run_simd < F > ( self , arch : F :: Arch )
247236 where
248237 F : SIMDVector < Scalar = f32 > + SIMDFloat + std:: ops:: Div < Output = F > ,
@@ -268,7 +257,6 @@ impl LeafKernel<'_, '_, '_> {
268257 }
269258 }
270259
271- #[ cfg( target_arch = "x86_64" ) ]
272260 fn run_fused < F , const SLOTS : usize > ( self , arch : F :: Arch )
273261 where
274262 F : SIMDVector < Scalar = f32 > + SIMDFloat + std:: ops:: Div < Output = F > ,
@@ -308,40 +296,20 @@ impl LeafKernel<'_, '_, '_> {
308296 }
309297}
310298
311- impl diskann_wide:: arch:: Target < diskann_wide:: arch:: Scalar , ( ) > for LeafKernel < ' _ , ' _ , ' _ > {
312- #[ inline( always) ]
313- fn run ( self , _: diskann_wide:: arch:: Scalar ) {
314- self . run_scalar ( ) ;
315- }
316- }
317-
318- #[ cfg( target_arch = "x86_64" ) ]
319- impl diskann_wide:: arch:: Target < diskann_wide:: arch:: x86_64:: V3 , ( ) > for LeafKernel < ' _ , ' _ , ' _ > {
320- #[ inline( always) ]
321- fn run ( self , arch : diskann_wide:: arch:: x86_64:: V3 ) {
322- diskann_wide:: alias!( F32x8 = <diskann_wide:: arch:: x86_64:: V3 >:: f32x8) ;
323- self . run_simd :: < F32x8 > ( arch) ;
324- }
325- }
326-
327- #[ cfg( target_arch = "x86_64" ) ]
328- impl diskann_wide:: arch:: Target < diskann_wide:: arch:: x86_64:: V4 , ( ) > for LeafKernel < ' _ , ' _ , ' _ > {
329- #[ inline( always) ]
330- fn run ( self , arch : diskann_wide:: arch:: x86_64:: V4 ) {
331- diskann_wide:: alias!( F32x16 = <diskann_wide:: arch:: x86_64:: V4 >:: f32x16) ;
332- self . run_simd :: < F32x16 > ( arch) ;
333- }
334- }
335-
336- #[ cfg( target_arch = "aarch64" ) ]
337- impl diskann_wide:: arch:: Target < diskann_wide:: arch:: aarch64:: Neon , ( ) > for LeafKernel < ' _ , ' _ , ' _ > {
299+ impl < A > diskann_wide:: arch:: Target < A , ( ) > for LeafKernel < ' _ , ' _ , ' _ >
300+ where
301+ A : Architecture ,
302+ A :: f32x16 : std:: ops:: Div < Output = A :: f32x16 > ,
303+ <A :: f32x16 as SIMDVector >:: Mask : SIMDSelect < A :: f32x16 > ,
304+ u64 : From < <<<A :: f32x16 as SIMDVector >:: Mask as SIMDMask >:: BitMask as SIMDMask >:: Underlying > ,
305+ {
338306 #[ inline( always) ]
339- fn run ( self , arch : diskann_wide:: arch:: aarch64:: Neon ) {
340- let _scalar = arch. retarget ( ) ;
341- self . run_scalar ( ) ;
307+ fn run ( self , arch : A ) {
308+ self . run_simd :: < A :: f32x16 > ( arch) ;
342309 }
343310}
344311
312+ #[ cfg( test) ]
345313fn process_pairs_scalar (
346314 input : LeafTopK < ' _ > ,
347315 k : usize ,
@@ -359,7 +327,6 @@ fn process_pairs_scalar(
359327 }
360328}
361329
362- #[ cfg( target_arch = "x86_64" ) ]
363330/// Fused dual-endpoint scan for row widths without a specialized arm.
364331///
365332/// Identical structure to [`process_pairs_simd_fused`], with the slot count
@@ -462,7 +429,6 @@ fn process_pairs_simd_dynamic<F>(
462429/// a chunk where neither endpoint can accept costs one branch. `SLOTS` is the
463430/// per-row neighbor count, threaded as a const so the insert arm is selected at
464431/// compile time.
465- #[ cfg( target_arch = "x86_64" ) ]
466432#[ inline( never) ]
467433fn process_pairs_simd_fused < F , const METRIC : u8 , const SLOTS : usize > (
468434 arch : F :: Arch ,
@@ -567,7 +533,6 @@ fn process_pairs_simd_fused<F, const METRIC: u8, const SLOTS: usize>(
567533 }
568534}
569535
570- #[ cfg( target_arch = "x86_64" ) ]
571536const fn metric < const METRIC : u8 > ( ) -> Metric {
572537 match METRIC {
573538 L2 => Metric :: L2 ,
@@ -589,7 +554,6 @@ const fn metric<const METRIC: u8>() -> Metric {
589554/// # Safety
590555///
591556/// `base + slots` must be within the allocation behind `output`.
592- #[ cfg( target_arch = "x86_64" ) ]
593557#[ inline( always) ]
594558unsafe fn insert_slots (
595559 output : * mut LeafNeighbor ,
@@ -669,7 +633,6 @@ unsafe fn insert_slots(
669633 }
670634}
671635
672- #[ cfg( target_arch = "x86_64" ) ]
673636#[ inline( always) ]
674637fn pair_distances < F > ( arch : F :: Arch , metric : Metric , dot : F , row_norm : F , column_norm : F ) -> F
675638where
@@ -741,6 +704,7 @@ fn pair_distance(metric: Metric, dot: f32, row_norm: f32, column_norm: f32) -> f
741704}
742705
743706#[ inline( always) ]
707+ #[ cfg( test) ]
744708fn insert_row (
745709 output : & mut [ LeafNeighbor ] ,
746710 worst : & mut [ f32 ] ,
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