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Add support for RockBase NM-CYD-C5 (ESP32-C5, ST7789 320x240)#37
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[WIP] Add support for NMTech NM-CYD-C5
Add support for RockBase NM-CYD-C5 (ESP32-C5, ST7789 320x240)
Aug 11, 2026
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Co-authored-by: clackups <179045798+clackups@users.noreply.github.com>
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Adds a new hardware model for the RockBase NM-CYD-C5 "Cheap Yellow Display" board: ESP32-C5 (RISC-V, Wi-Fi 6 + BLE 5), 2.8" ST7789 SPI color LCD (320x240), 16MB flash / 8MB PSRAM.
Kconfig
DRAFTLING_MODEL_NM_CYD_C5choice (depends on IDF_TARGET_ESP32C5)DRAFTLING_DISPLAY_ST7789derived flag gating the new backend; wired intoDRAFTLING_DISPLAY_COLOR,DRAFTLING_DISPLAY_HAS_BACKLIGHT,DRAFTLING_WAKEUP_GPIO, width/heightDisplay backend
components/display/display_st7789.cppusing the upstreamespressif/esp_lcd_st7789managed component (esp_lcd_new_panel_st7789()), unlike the hand-rolled AXS15231B vendor sequenceesp_lcd_panel_draw_bitmap()display_st7789_config_tstruct-based init (mirrors thedisplay_axs15231b_config_tpattern) since the panel needs more pins than the genericdisplay_init()slotsBoard wiring
main/boards/nm_cyd_c5.h: display, MicroSD, and (unused) XPT2046 touch CS all share one physical SPI bus with separate CS lines. No battery monitor, no wake GPIO (no user buttons besides power) -- deep sleep wakes only via hardware RESET, matching M5Stack Tab5 precedentmain/main.cpp: new display-init branch; SD-init reuses the display's already-initialized SPI bus (mosi/miso/sck = -1)Build config
sdkconfig.defaults.esp32c5: Quad-mode PSRAM (C5 silicon has no Octal support), BLE-only Bluedroid, WiFi tuningsdkconfig.defaults.nm_cyd_c5: target + model selectionnm_cyd_c5preset inCMakePresets.jsonDocs
README.md/AGENTS.md: added board entry, updated preset list and board countsKnown limitation
XPT2046 resistive touch is not wired up -- Draftling's touchscreen component currently only supports I2C capacitive controllers. The pin is reserved in the board header for future work; the board remains keyboard-driven like every other supported board.