Laguna: bridge and management port fixes

board/aarch64/microchip-ev23x71a/Config.in

@@ -1,6 +1,7 @@
 config BR2_PACKAGE_MICROCHIP_EV23X71A
 	bool "Microchip EV23X71A (Laguna)"
 	depends on BR2_aarch64
+	select BR2_PACKAGE_SYMREG
 	help
 	  Support for the Microchip EV23X71A evaluation board, based on
 	  the LAN969x (Laguna) family of TSN capable switches.  24 GbE

board/aarch64/microchip-ev23x71a/README.md

@@ -28,11 +28,13 @@ Not yet done:
 - TSN queueing.  PSFP and time aware shaping need `NET_SCH_TAPRIO`,
   `NET_ACT_GATE`, `NET_SCH_ETS`, and `NET_SCH_CBS`, all currently off
 - HSR/PRP offload, see above
-- MAC addresses.  With no environment in flash the board falls back to
-  `lan969x_otp_get_mac()`, which derives 30 addresses for this board
-  from OTP, but the OTP address block is blank on our sample, so
-  interfaces come up random.  Provisioning it is a one way operation,
-  `boot-monitor.rb --otp-data <offset>:<hexstring>` in monitor mode
+- MAC addresses from OTP.  With no environment in flash the board falls
+  back to `lan969x_otp_get_mac()`, which derives 30 addresses for this
+  board from OTP, but the OTP address block is blank on our sample.
+  Provisioning it is a one way operation, `boot-monitor.rb --otp-data
+  <offset>:<hexstring>` in monitor mode.  Until then, give the board a
+  base MAC in `/mnt/aux/vpd.bin`, see [VPD](../../../doc/vpd.md#vpd-file-on-the-aux-partition),
+  or its interfaces come up random
 
 ## Boot Chain
 

board/aarch64/microchip-ev23x71a/dts/microchip/infix.dtsi

@@ -13,3 +13,15 @@
 		};
 	};
 };
+
+/* Register access by name for the symreg tool, debugfs only */
+&axi {
+	symreg@e00c0000 {
+		compatible = "microchip,sparx5-symreg";
+		reg = <0xe00c0000 0x10000>,
+		      <0xe2000000 0x2000000>;
+		reg-names = "cpu", "dev";
+		microchip,symreg = <0xe00c0000 0x10000>,
+				   <0xe2000000 0x2000000>;
+	};
+};

board/aarch64/microchip-ev23x71a/dts/microchip/lan9696-ev23x71a-vpd.dtsi

@@ -0,0 +1,44 @@
+/*
+ * Product VPD, an ONIE TLV that the boot loader copies from the aux
+ * partition into reserved memory.  The region is zeroed when there is
+ * no VPD, which leaves the layout without cells.  Ports reference the
+ * base MAC address with an index, <&base_mac N>, and get base + N as
+ * their permanent address.
+ */
+/ {
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		vpd: vpd@63e00000 {
+			compatible = "nvmem-rmem";
+			reg = <0x63e00000 0x10000>;
+			no-map;
+			infix,board = "product";
+
+			nvmem-layout {
+				compatible = "onie,tlv-layout";
+
+				base_mac: mac-address {
+					#nvmem-cell-cells = <1>;
+				};
+			};
+		};
+	};
+};
+
+&switch {
+	nvmem-cells = <&base_mac 0>;
+	nvmem-cell-names = "mac-address";
+};
+
+/* The driver gives port@N base + N + 1, e1 .. e28.  e29 is base + 29. */
+&switch {
+	ethernet-ports {
+		port@29 {
+			nvmem-cells = <&base_mac 29>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+};

board/aarch64/microchip-ev23x71a/dts/microchip/lan9696-ev23x71a.dts

@@ -5,3 +5,4 @@
 
 #include <arm64/microchip/lan9696-ev23x71a.dts>
 #include "infix.dtsi"
+#include "lan9696-ev23x71a-vpd.dtsi"

board/aarch64/microchip-lan969x/README.md

@@ -0,0 +1,72 @@
+# Microchip LAN969x (Laguna)
+
+Files shared by the boards built on the LAN969x switch family:
+
+| Board                                           | Package                            |
+|-------------------------------------------------|------------------------------------|
+| [Microchip EV23X71A](../microchip-ev23x71a)     | `BR2_PACKAGE_MICROCHIP_EV23X71A`   |
+| [Novarq Tactical 1000](../novarq-tactical-1000) | `BR2_PACKAGE_NOVARQ_TACTICAL_1000` |
+
+`uboot/` holds the U-Boot config fragment and environment used by the
+`*_boot_defconfig` of each board.  Kernel device tree and configuration
+fixups stay with each board, see its `dts/` directory and `.mk` file.
+
+A new Laguna board should select `BR2_PACKAGE_SYMREG` in its `Config.in`
+and carry the `microchip,sparx5-symreg` node in its `dts/microchip/infix.dtsi`,
+copied from one of the boards above, so the tool below works on it too.
+
+## Debugging
+
+### Register access by name
+
+Every Laguna board ships `symreg`, Microchip's tool for reading and
+writing switch registers by their datasheet names.  It talks to the
+`symreg` debugfs driver, which maps the register space the device tree
+node describes and exposes it as `/sys/kernel/debug/symreg/mem`.  Root
+only, since debugfs is.
+
+```
+symreg --help                   # options and the register syntax
+symreg -m                       # MAC table
+symreg -v                       # VLAN table
+symreg -c 0                     # VCAP instance 0
+symreg -s                       # stream table
+
+symreg 'DEV2G5[29]*'            # all registers of port 29's device block
+symreg 'ASM*[29]*'              # ingress side of the same port
+symreg -a 'DSM*[29]*'           # same, with the physical addresses
+
+symreg REG[idx]                 # read one register
+symreg REG[idx].FIELD           # read one field
+symreg REG[idx].FIELD 1         # write one field, add -f for wildcards
+```
+
+Register and field names follow the LAN969x datasheet.  Quote the
+wildcards or the shell expands them.  The dispatcher `symreg` picks the
+SoC from `/proc/device-tree/compatible` and runs `symreg_lan969x`, which
+can also be called directly.
+
+The tool reads live hardware, so the useful pattern for an intermittent
+fault is a snapshot while the port works, another once it has failed,
+and a diff of the two.  For the management port, which is switch port 29
+on both boards:
+
+```bash
+for blk in 'DEV2G5[29]*' 'ASM*[29]*' 'DSM*[29]*' 'QSYS*[29]*'; do
+	symreg "$blk"
+done >/tmp/port29-$(date +%s).txt
+```
+
+Check the PHY as well.  The management PHY sits on the GCB MDIO bus and
+shares one level triggered interrupt line with the copper PHYs, so a
+stale link state can come from a missed PHY interrupt as well as from
+the switch.  Read it with `mdio` from mdio-tools, see the
+[EV23X71A README](../microchip-ev23x71a/README.md#debug-and-analysis),
+which also covers the VCAP debugfs and `ethtool` counters; both apply to
+either board.
+
+### Writing registers
+
+Writes take effect immediately and bypass the driver, which keeps no
+record of them.  Expect the driver's own view to disagree afterwards,
+and reboot before trusting any behaviour again.

board/aarch64/microchip-lan969x/uboot/lan969x-env.dtsi

@@ -36,6 +36,7 @@
 	ixboard = "if setexpr.l cid *0xe2010000 && setexpr cid ${cid} / 0x1000 && setexpr cid ${cid} % 0x10000 && test ${cid} = 9697; then setenv board novarq,tactical-1000; setenv fdtfile microchip/lan9696-tactical-1000.dtb; fi";
 
 	loadaddr          = "0x63000000";
+	vpd_addr_r        = "0x63e00000";
 	fdt_addr_r        = "0x63f00000";
 	kernel_addr_r     = "0x64000000";
 	fdtoverlay_addr_r = "0x67f00000";

board/aarch64/novarq-tactical-1000/Config.in

@@ -1,6 +1,7 @@
 config BR2_PACKAGE_NOVARQ_TACTICAL_1000
 	bool "Novarq Tactical 1000 (Laguna)"
 	depends on BR2_aarch64
+	select BR2_PACKAGE_SYMREG
 	help
 	  Support for the Novarq Tactical 1000, based on the LAN969x
 	  (Laguna) family of TSN capable switches.  24 GbE copper ports,

board/aarch64/novarq-tactical-1000/README.md

@@ -104,6 +104,26 @@ Storage][7].  A unit still on the vendor U-Boot netboots as described in
 [Netboot with a Vendor U-Boot][8].  The first boot grows `var` to fill the
 eMMC and reboots once by itself.
 
+## Identity
+
+The board has no MAC address in OTP, so without help every boot gets a
+random base MAC and random port addresses, which also change the
+link-local addresses the test rig finds the unit by.  `provision-tactical`
+offers to write a base MAC and a serial number to `vpd.bin` on the `aux`
+partition, which the bootloader hands to the system as its product VPD.
+The vendor U-Boot does not, it takes the Infix one, see
+[Bootloader](#bootloader).  On a unit already provisioned, write it by
+hand and reboot:
+
+```bash
+echo '{"mac-address":"02:00:00:7a:c7:00","serial-number":"tact1","vendor":"Novarq","product-name":"Tactical-1000"}' \
+  | onieprom -e | sudo tee /mnt/aux/vpd.bin >/dev/null
+```
+
+The base MAC becomes the chassis address, `e1` gets base + 1, `e2` base + 2,
+and so on, `mgmt` base + 29, as permanent port addresses.  See [VPD][9]
+for the format.
+
 ## Device Tree
 
 Cherry-picked from [Novarq's kernel tree][2].  One commit adapts it to
@@ -152,3 +172,4 @@ unused.
 [6]: https://github.com/novarq/tactical-1000/blob/main/docs/boot-modes.md
 [7]: ../../../doc/netboot.md#installing-to-onboard-storage
 [8]: ../../../doc/netboot.md#netboot-with-a-vendor-u-boot
+[9]: ../../../doc/vpd.md#vpd-file-on-the-aux-partition

board/aarch64/novarq-tactical-1000/dts/microchip/infix.dtsi

@@ -13,3 +13,15 @@
 		};
 	};
 };
+
+/* Register access by name for the symreg tool, debugfs only */
+&axi {
+	symreg@e00c0000 {
+		compatible = "microchip,sparx5-symreg";
+		reg = <0xe00c0000 0x10000>,
+		      <0xe2000000 0x2000000>;
+		reg-names = "cpu", "dev";
+		microchip,symreg = <0xe00c0000 0x10000>,
+				   <0xe2000000 0x2000000>;
+	};
+};