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Avoid TC address cache overwrite when setting extended timeout - #768

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@puddly

@puddly puddly commented Oct 15, 2026

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See #765 and NabuCasa/silabs-firmware-builder#236 for more context on the firmware side.

The address table actually contains the trust center address cache as a trailer so there's a small chance we can override an entry. Instead of randomly selecting entries, we round robin instead.

Copilot AI balanced review requested due to automatic review settings October 15, 2026 20:08
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codecov Bot commented Oct 15, 2026

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Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 99.58%. Comparing base (aea9248) to head (afcd5d5).

Additional details and impacted files
@@           Coverage Diff           @@
##              dev     #768   +/-   ##
=======================================
  Coverage   99.58%   99.58%           
=======================================
  Files          64       64           
  Lines        4331     4332    +1     
=======================================
+ Hits         4313     4314    +1     
  Misses         18       18           

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🟢 Approval recommended

The change is narrow, preserves configured table bounds, and includes tests for sequential allocation and wraparound.

0 open findings

What changed in this PR

Changes extended-timeout address-table allocation from random selection to bounded round-robin, complementing the related firmware work.

Changes:

  • Adds a persistent cursor for sequential slot selection.
  • Updates tests to verify sequential allocation and wraparound.
File Description
tests/​test_ezsp_v4.py Verifies sequential selection and wraparound.
tests/​test_ezsp_v14.py Updates the expected initial slot.
bellows/​ezsp/​v4/​__init__.py Replaces random selection with round-robin allocation.
bellows/​ezsp/​protocol.py Initializes the address-table cursor.

🧠 Review effort: Balanced


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3 participants